![](https://journeys.dartmouth.edu/gavinburns/files/2022/03/Screen-Shot-2021-08-30-at-19.35.23-1024x647.png)
![](https://journeys.dartmouth.edu/gavinburns/files/2022/03/Main-Controller-1024x1001.png)
![](https://journeys.dartmouth.edu/gavinburns/files/2022/03/ASCII_Converter_Full_Sim-1024x291.png)
![](https://journeys.dartmouth.edu/gavinburns/files/2022/03/MathBlockDiagram-1024x544.png)
Problem
Outside of calculator programs, classic hardware calculators are built on the transistor and gate-level design. To develop our understanding of these principles we designed and implemented a calculator into an FPGA board using a controller/datapath design and VHDL code.
Solution
My partner and I utilized a top-down design principle to break up the necessary parts of the calculator into core blocks. The blocks we designated were: UART serial communicator, ASCII converter, main controller, main datapath, math block, binary to BCD converter, and display. Each block was then designed, test-benched, and implemented into the FPGA board with debugging and ease-of-life modifications made along the way.
Our final product achieved the following functionalities:
- Keyboard to FPGA board serial communication
- The 4 fundamental mathematical operations (addition, subtraction, multiplication, and division)
- Equation chaining
- Negative number computation
- Equation state LED notifications
- Overflow handling
- Operand checks